# Problem Match each instruction to the proper addressing mode. # Process ... # Answer | Addressing mode | Instruction | | -------------------------------------- | ------------------- | | Post-indexed | `LDR r0, [r1], #2` | | Register indirect with register offset | `LDR r0, [r1, r2]` | | Register indirect with constant offset | `LDR r0, [r1, #2]` | | Pre-indexed | `LDR r0, [r1, #2]!` | | Register indirect | `LDR r0, [r1]` |