Counter

On every clock pulse, the counter will increment the output number by 1. It is limited to 2 binary digits, which can represent 0 to 3. By changing the size of the number register, you can count to larger numbers.

module counter(
	input clock,
	input reset,
	output reg [1:0] number
);
	always @(posedge clock or posedge reset) begin
		if (reset) begin
			number <= 2'b00;
		end else begin
			if (number) begin
				number <= number + 1;
			end
		end
	end
endmodule