PLDs

What does PLD stand for?
PLD stands for Programmable Logic Device.

What are Programmable Logic Devices (PLDs)?
PLDs are general purpose chips for implementing circuits.

How are Programmable Logic Devices (PLDs) customized?
PLDs are customized using programmable switches.

What are the main types of PLDs?
The main types of PLDs are:

  • Programmable Logic Array (PLA).
  • Programmable Array Logic (PAL).
  • Read Only Memory (ROM).
  • Complex Programmable Logic Device (CPLD).
  • Field Programmable Gate Array (FPGA).

PLD as a Black Box

What are the inputs of a Programmable Logic Device (PLD)?
The inputs of a PLD are logic variables.

What is inside of a Programmable Logic Device (PLD)?
The inside of a PLD has logic gates and programmable switches.

What are the outputs of a Programmable Logic Device (PLD)?
The outputs of a PLD are logic functions.

Programmable Logic Array (PLA)

What type of circuit are Programmable Logic Arrays (PLAs) used to implement?
The type of circuit that PLAs are used to implement are circuits in SOP form.

What two planes are programmable in Programmable Logic Arrays (PLAs)?
In PLAs, the two planes that are programmable are the:

  1. AND plane.
  2. OR plane.

Programmable Array Logic (PAL)

What type of circuit is Programmable Array Logic (PAL) used to implement?
The type of circuit that PAL is used to implement are circuits in SOP form.

What plane is programmable in Programmable Array Logic (PAL)?
In PAL, the plane that is programmable is the AND plane.

Limitations of PLAs

What is the typical number of inputs, product terms, and outputs for Programmable Logic Arrays (PLAs)?
The typical number of inputs, product terms, and outputs for PLAs is:

  • Inputs - 16.
  • Product terms - 32.
  • Outputs - 8.

Each AND gate has ... ... which isn't ideal because it ...
Each AND gate has large fan-in which isn't ideal because it limits the number of inputs that can be provided in a PLA.

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Comparing PALs and PLAs

What limitations does Programmable Array Logic (PAL) have in comparison to Programmable Logic Arrays (PLAs)?
In comparison to PLAs, PAL has the same limitations.

What limitation does Programmable Array Logic (PAL) have?
PAL has less flexibility because of the fixed connections in the OR plane.

What advantage does Programmable Array Logic (PAL) have over Programmable Logic Arrays (PLAs)?
The advantage that PAL has over PLAs is that they're faster and cheaper.

What does Programmable Array Logic (PAL) often come with?
PAL often comes with extra circuitry connected o the output of each OR gate?

What is an OR gate in Programmable Array Logic (PAL) called when combined with the extra circuitry?
When combined with the extra circuitry, an OR gate in PAL is called a macrocell.

Macrocell

What are the five input signals of a macrocell?
The five input signals of a macrocell are:

  1. and .
  2. Clock.
  3. Select.
  4. Enable.

What are the three output signals of a macrocell?
The three output signals of a macrocell are:

  1. .
  2. looped back to the AND plane.
  3. looped back to the AND plane.

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Macrocell Functions

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Multi-Level Design with PALs

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ROM

What does ROM stand for?
ROM stands for Read Only Memory.

What plane of Read Only Memory (ROM) is programmable?
The plane of ROM that's programmable is the OR plane.

What is the size of the AND plane in Read Only Memory (ROM) with number of input pins?
With number of input pins, the size of the AND plane in ROM is .

What does the OR plane in Read Only Memory (ROM) dictate?
The OR plane in ROM dictates the function mapped by the ROM.

Programming SPLDs

What does SPLD stand for?
SPLD stands for Simple Programmable Logic Device.

What are Programmable Logic Arrays (PLAs), Programmable Array Logic (PAL), and Read Only Memory (ROM) also called?
PLAs, PAL, and ROM are also called SPLDs.

What must be done to Simple Programmable Logic Devices (SPLDs) to make it so the switches are in the correct places?
To make it so the switches are in the correct places, SPLDs are programmed.

What is usually required when programming Simple Programmable Logic Devices (SPLDs)?
When programming SPLDs, it's usually required to use CAD tools.

What is created by CAD tools for programming Simple Programmable Logic Devices (SPLDs) and what is done with it?
For programming SPLDs, CAD tools create a fuse map that's downloaded to the device via a special programming unit.

What are the two basic types of programming techniques for programming Simple Programmable Logic Devices (SPLDs)?
The two basic types of programming techniques for programming SPLDs are:

  1. Removable sockets on a PCB.
  2. In System Programming (ISP) on a Printed Circuit Board (PCB).

Is In System Programming (ISP) common for Programmable Logic Arrays (PLAs) and Programmable Array Logic (PAL)?
No, ISP isn't common for PLAs and PAL.

What is In System Programming (ISP) commonly used with?
ISP is commonly used with more complex PLDs.

An SPLD Programming Unit

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Removable SPLD Socket Package

What does PLCC stand for?
PLCC stands for Plastic-Leaded Chip Carrier.

Where is the Plastic-Leaded Chip Carrier (PLCC)?
The PLCC is soldered to the PCB.

In System Programming (ISP)

When is In System Programming (ISP) used?
ISP is used when the SPLD can't be removed from the PCB.

What is required in order to use In System Programming?
In order to use ISP, it's required to program the SPLD from an attached computer.

What two complex Programmable Logic Devices (PLDs) are usually programmed with In System Programming?
Two complex PLDs that are usually programmed with ISP are:

  1. CPLDs.
  2. FPGAs.

CPLD

What does CPLD stand for?
CPLD stands for Complex Programmable Logic Device.

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