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2. final-exam-review.html
3. lecture-1.1-introduction-and-course-overview.html
4. lecture-2.1-logic-gates-&-circuits.html
5. lecture-2.2-the-laws-of-boolean-algebra.html
6. lecture-2.3-logic-building-methodology.html
7. lecture-3.1-boolean-function-optimization-&-minimization.html
8. lecture-3.2-some-additional-concepts-in-combinational-logic-design.html
9. lecture-4.1-number-representation-and-unsigned-addition.html
10. lecture-4.2-signed-arithmetic.html
11. lecture-5.1-data-routing-logic-pt.-1.html
12. lecture-5.2-data-routing-logic-pt.-2.html
13. lecture-6.1-sequential-circuits-level-triggered-circuits.html
14. lecture-6.2-sequential-circuits-edge-triggered-circuits.html
15. lecture-6.3-flipflops-and-registers.html
16. lecture-6.4-synchronous-circuit.html
17. lecture-7.1-state-machines.html
18. lecture-7.2-algorithmic-state-machines.html
19. lecture-8.1-simple-microprocessor-pt.-1.html
20. lecture-8.2-simple-microprocessor-pt.-2.html
21. lecture-8.4-programmable-devices.html
22. midterm-1-feedback.html
23. resources.html
24. review-session.html
25. special-lecture-verilog-overview.html
26. syllabus.html