tags:
- ece230
- bsu
- school
- digital-systems
- electronics
- lecture
- notes
- fall-2024
source: https://boisestatecanvas.instructure.com/courses/34549/files?preview=16433211
created: 2024-08-26
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What is an axiom?
An axiom is a fundamental truth or assumption accepted without proof.
What are the AND axioms?
The AND axioms are:
What are the OR axioms?
The OR axioms are:
What are the NOT axioms?
The NOT axioms are:
What is a theorem?
A theorem is a statement proven to be true using axioms.
What are the fundamental theorems of Boolean algebra? (1)
The fundamental theorems of Boolean algebra are:
Laws / Theorems | ||
---|---|---|
Boundness law | ||
Identity law | ||
Idempotent theorem | ||
Involution theorem | ||
Complement law | ||
Commutative law | ||
Associative law | ||
Distributive law | ||
DeMorgan's law (1) | ||
Absorption law | ||
Consensus theorem |
Two variables right next to each other means AND:
What are the three inverted logic gates?
The three inverted logic gates are:
What is inverted with inverted logic gates?
With inverted logic gates, their output is inverted.
What are the three compound symbols for NAND, NOR, and XNOR?
The three compound symbols for NAND, NOR, and XNOR are:
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According to DeMorgan's law, what is the negation of
According to DeMorgan's law, the negation of
According to DeMorgan's law, what is the negation of A OR B equal to?
According to DeMorgan's law, the negation of
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What does HDL stand for?
HDL stands for Hardware Descriptive Language.
What is the syntax for a logic gate in Verilog HDL?
The syntax for a logic gate in Verilog HDL is gate_name(out_ports, in_ports)
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What is a module in Verilog HDL?
In Verilog HDL, a module is a container for a logic circuit with input and output ports, and a custom name.
module riverfront(x, y, q);
input x, y;
output q;
and(q, x, y);
endmodule