tags:
- ece230
- bsu
- school
- digital-systems
- electronics
- lecture
- notes
- fall-2024
source: https://boisestatecanvas.instructure.com/courses/34549/files?preview=17149822
created: 2024-10-30
...
...
...
What is the circuit diagram for a D-FlipFlop with a preset and a clear signal?
The circuit diagram for a D-FlipFlop with a preset and a clear signal is:
What is the symbol for a D-FlipFlop with a preset and clear signal?
The symbol for a D-FlipFlop with a preset and clear signal is:
When does an asynchronous reset take effect?
An asynchronous reset takes effect immediately.
When does a synchronous reset take effect?
A synchronous reset takes effect at the next clock edge.
What does a synchronous and asynchronous reset look like on a D-FlipFlop with a preset and clear signal?
A synchronous and asynchronous reset on a D-FlipFlop with a preset and clear signal looks like this:
What happens when the enable signal for a synchronous counter made using T-FlipFlops is 0?
When the enable signal for a synchronous counter made using T-FlipFlops is 0, all of the T inputs are forced to be zero.
What happens when the clear signal for a synchronous counter made using T-FlipFlop is 1?
When the clear signal for a synchronous counter made using T-FlipFlops is 1, all of the T inputs are set to 0 on the next clock edge.
...